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Track width and equal lengths

How wide a track must be for its current (IPC-2221), why ground wants a pour, and which pairs, like USB D+ and D-, should have the same length.

What it is#

A track is a thin strip of copper, and copper has resistance. The current through it turns into heat, so a track that carries more current must be wider. Signals carry almost nothing; a supply that feeds an LED strip or a motor carries amperes.

Rules of thumb#

  • Signals: 0.2–0.25 mm. Narrower is possible but harder to solder and to repair.
  • Supplies: size them by current with the table below. In PCB Canvas, 0.3 mm is the smallest width suggested for a supply, even when the formula allows less: it keeps the voltage drop small and survives rework.
  • GND: a ground pour on both layers beats any track.
  • Never below the fab minimum: JLCPCB makes 0.10 mm, and the standard price holds from 0.127 mm (Board setup → Rules).

The IPC-2221 table#

IPC-2221 relates current, temperature rise and the copper cross-section: I = k · ΔT^0.44 · A^0.725, with I in amperes, ΔT in °C, A in square mils, k = 0.048 for top and bottom tracks and 0.024 for inner layers. One ounce copper is 35 µm thick. The widths below are for outer tracks:

Current 1 oz, +10 °C 1 oz, +20 °C 2 oz, +10 °C
0.5 A 0.12 mm 0.08 mm 0.06 mm
1 A 0.30 mm 0.20 mm 0.15 mm
1.5 A 0.53 mm 0.35 mm 0.26 mm
2 A 0.78 mm 0.51 mm 0.39 mm
3 A 1.37 mm 0.90 mm 0.68 mm
5 A 2.77 mm 1.82 mm 1.38 mm

A 10 °C rise is gentle; the suggestions use it. Inner layers of a 4-layer board cool worse and need about 2.6 times the width. The Current tab of Board setup computes any other case.

How much current?#

“Suggest net classes” (Board setup → Net classes, and by itself after Update PCB) estimates it from the parts on each net, and shows its reasoning:

  • USB-C VBUS: 1.5 A. A plain USB 2.0 port gives 0.5 A; a fuse on the net caps the estimate at its rating.
  • Barrel jack: 2 A. A linear regulator: 0.5 A. A buck converter: 2 A, also on its switch node and behind its inductor.
  • ESP32 module supply: 0.5 A, for the Wi-Fi peaks.
  • MOSFET outputs and LED strip connectors: your load setting (2 A by default). A supply that feeds four 2 A outputs carries 8 A.
  • GND: the largest supply current, which returns through it.

Examples: a USB-C board with a 500 mA fuse needs only 0.3 mm on VBUS. An LED strip of 60 WS2812B LEDs draws up to 2.2 A at full white, so its 5V track wants 0.8 mm. Four 2 A outputs on 12V need 5.3 mm, which is easier as a pour.

The suggestions never make a net narrower and never change a class you made. Apply is one undo step.

Example circuit: An LED strip on J3: STRIP_DIN marks it as a strip, so 5V and GND are sized for your load setting, 0.8 mm for 2 A.
An LED strip on J3: STRIP_DIN marks it as a strip, so 5V and GND are sized for your load setting, 0.8 mm for 2 A. Open the screw_terminal_strip example from this page in PCB Canvas: “Insert into my schematic”.

Tracks of equal length#

Some signals travel as a pair, one the mirror of the other. The receiver looks at the difference, so both should arrive at the same time and run side by side. PCB Canvas finds them by pin and net names and tells you in the inspector, on the Track tool’s hint and as a DRC warning after routing:

Pair How it is found Warning above
USB D+/D- pins D+/D-, DP/DM, nets USB_DP/USB_DN 0.5 mm
CAN H/L nets CANH/CANL 5 mm
Other differential pairs nets ending in _P/_N or +/- 0.5 mm

USB: what really matters#

  • Full speed (12 Mbit/s), which the ESP32-C3, ESP32-S3 and RP2040 use, is forgiving: the edges are slow compared to a few millimetres of track. Keep D+ and D- together and short; the 0.5 mm warning is a good habit, not a hard limit.
  • High speed (480 Mbit/s) wants a 90 Ω differential impedance (±15 %) and matched lengths. TI asks for less than 1.27 mm (50 mil) of mismatch; Renesas allows 2.5 mm.
  • Honestly: on a 1.6 mm 2-layer board the ground is far below the tracks, so 90 Ω needs a geometry the USB connector pads do not allow. A hobby board cannot hit it exactly. Short tracks, no vias, a solid ground pour under the pair and equal lengths are what you can do, and they work for full speed.
Example circuit: USB_DP and USB_DN pass the ESD protection side by side; after routing, DRC warns when their lengths differ by more than 0.5 mm.
USB_DP and USB_DN pass the ESD protection side by side; after routing, DRC warns when their lengths differ by more than 0.5 mm. Open the usb_esd example from this page in PCB Canvas: “Insert into my schematic”.

Pitfalls#

  • Thin power tracks. They get warm, and the voltage drops along them: a regulator far away sees less than it should.
  • Vias on power nets. One small via carries roughly what a narrow track does; use two or more for an ampere or more.
  • Splitting the pair. Routing D+ around one side of a part and D- around the other makes a loop that picks up noise.

Sources#

  • IPC-2221B, Generic Standard on Printed Board Design, section 6.2 and the current chart (the formula is the curve fit used by the common calculators).
  • JLCPCB PCB capabilities (jlcpcb.com/capabilities/pcb-capabilities): minimum track and gap.
  • USB Type-C specification: USB 2.0 default power 500 mA, Type-C current 1.5 A and 3 A.
  • TI TUSB4041 datasheet, layout guidelines: USB 2.0 pair mismatch below 50 mil. TI BQ24392 datasheet: 90 Ω ±15 % differential.
  • Renesas RZ/A1 guidelines for high-speed USB 2.0 board design: D+/D- length difference 2.5 mm or less.